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Description: Risc processor :- Instruction fetch code
Platform: |
Size: 5120 |
Author: mahesh |
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Description: RISC controller code in verilog working code-RISC controller code in verilog working code--VVV
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Size: 70656 |
Author: hr |
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Description: iso7816_plain.c implements an interface between an RS-232 serial port and an ISO 7816 smart card, and is targeted for the Atmel AT90S2313 microcontroller in a development terminal. The source code is written entirely in C using the WinAVR tool suite. WinAVR is a suite of executable, open source software development tools for the Atmel AVR series of RISC microcontrollers hosted on the Windows platform. It includes the GNU GCC compiler (avr-gcc) for C and C++. WinAVR is provided free of charge.
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Size: 8192 |
Author: Subramanyam |
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Description: risc processor vhdl code and it is very useful
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Size: 257024 |
Author: k |
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Description: 设计一台 8 位的 RISC 模型机，要求具有以下验证程序所要求的功能：
求出 1 到任意一个整数 N 之间的所有偶数之和并输出显示，和为单字长。说明：N 从开
关输入，和从数码管输出，然后输出显示停止。--risc8 bit microprocessor vhdl source code. Processing functions: find an integer N between 1 and any odd sum. And output.
Platform: |
Size: 1868800 |
Author: 韦乃华 |
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Description: SMDK2413 (Samsung MCU Development Kit) for S3C2413X is a platform that is suitable for code development of SAMSUNG s S3C2413X 16/32-bit RISC microcontroller (ARM926EJ-S) for hand-held devices and general applications. The S3C2413X consists of 16-/32-bit RISC (ARM926EJ-S) CPU core, separate 8KB instruction and 8KB data cache, MMU to handle virtual memory management, LCD controller (STN & TFT), NAND flash boot loader, System Manager (chip select logic and SDRAM controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O ports, RTC, 8-ch 10-bit ADC and touch screen interface, IIC-BUS interface, IIS-BUS interface, USB host, USB device, SD host & multimedia card interface, ATA Interface, IrDA, Camera Interface, Watch Dog Timer, 2-ch SPI and PLL for clock generation. The SMDK2413 consists of S3C2413X, boot EEPROM (flash ROM), SDRAM, LCD interface, two serial communication ports, configuration switches, JTAG interface and status LEDs.
Platform: |
Size: 2135040 |
Author: fateme |
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Description: LM3S615 微控制器包含以下的产品特性：
32 位RISC 性能
－ 采用为小型嵌入式应用方案而优化的32 位ARM® CortexTM M3 v7M 结构
－ 可兼容Thumb® 的Thumb-2 专用指令集处理器内核，可提高代码密度
－ 50-MHz 工作频率
－ 硬件除法和单周期乘法
－ 集成了嵌套向量中断控制器（NVIC）以提供明确的中断处理
－ 29 个中断，带8 个优先级
－ 存储器保护单元（MPU）为受保护的操作系统功能提供了一种特权模式
－ 非对齐式的数据访问，使数据可以有效地压入内存
－ 极细微的位元处理操作(atomic bit-banding)可最大限度地使用内存，并且提供
精简（streamlined）的外设控制-LM3S615 micro controller contains the following characteristics:
32 位RISC 性能
-the embedded application scheme for the small and the optimization of the 32-bit ARM ® CortexTM M3 v7M structure
-compatible with the Thumb ® Thumb-2 special instruction set processor core, can improve the code density
-50-MHz working frequency
-hardware division and single cycle the multiplication
-integrated nested vector interrupt controller (NVIC) to provide clear interrupt handling
-29 interrupt, with eight priority
-memory protection unit (MPU) for protected operating system function provides a privilege mode
-the alignment of the type data access, so that data can be effective pressure into memory
-extremely slight bit processing operation (atomic bit-banding) can maximum use of memory, and to provide
Streamline (streamlined) control of peripherals
Platform: |
Size: 2130944 |
Author: 周文杰 |
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Description: vhdl code for risc processor-vhdl code for risc processor...........................
Platform: |
Size: 10240 |
Author: satya |
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Description: 低电源电压范围为1.8 V至3.6 V
超低功耗：
- 主动模式：280μA，在1 MHz，2.2伏
- 待机模式：1.1μA
- 关闭模式（RAM保持）：0.1μA
五省电模式
欠待机模式唤醒
超过6微秒
16位RISC架构，
125 ns指令周期时间
12位A/ D转换器具有内部
参考，采样和保持，并
AutoScan功能
16位Timer_B随着三† 或七‡
捕捉/比较随着阴影寄存器
具有三个16位定时器A
捕捉/比较寄存器
片上比较器
串行通信接口（USART），
选择异步UART或
同步SPI软件：
- 两个USART（USART0 USART1）的†
- 一个USART（USART0）‡
掉电检测
电源电压监控器/监视器
可编程电平检测
串行板载编程，
无需外部编程电压
安全可编程代码保护
融合-Low Supply-Voltage Range, 1.8 V to 3.6 V
Ultralow-Power Consumption:
− Active Mode: 280 µ A at 1 MHz, 2.2 V
− Standby Mode: 1.1 µ A
− Off Mode (RAM Retention): 0.1 µ A
Five Power Saving Modes
Wake-Up From Standby Mode in Less
Than 6 µ s
16-Bit RISC Architecture,
125-ns Instruction Cycle Time
12-Bit A/D Converter With Internal
Reference, Sample-and-Hold and
Autoscan Feature
16-Bit Timer_B With Three† or Seven‡
Capture/Compare-With-Shadow Registers
16-Bit Timer_A With Three
Capture/Compare Registers
On-Chip Comparator
Serial Communication Interface (USART),
Select Asynchronous UART or
Synchronous SPI by Software:
− Two USARTs (USART0, USART1)†
− One USART (USART0)‡
Brownout Detector
Supply Voltage Supervisor/Monitor With
Programmable Level Detection
Serial Onboard Programming,
No External Programming Voltage Needed
Programmable Code Protection by Security
Fuse
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Size: 1932288 |
Author: 苏春明 |
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Description: 夏宇闻 verilog数字系统设计教程源码 第二版，实现了简单的RISC CPU。印刷版有误，已改正。- A simple RISC CPU Verilog HDL source code. Work well.
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Size: 9216 |
Author: Jian SUN |
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Description: 以ARM9E-S为例介绍ARM9处理器的主要结构及其特点。ARM9E-S的结构如图4所示。其主要特点如下： (1)32bit定点RISC处理器，改进型ARM／Thumb代码交织，增强性乘法器-ARM9E-S, for example the main structure and its characteristics on ARM9 processor. ARM9E-S structure is shown in Figure 4. Its main features are as follows: (1) 32bit the sentinel RISC processor, improved ARM/Thumb code intertwined enhance sexual multiplier ...
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Size: 4930560 |
Author: zhaoxinyue |
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Description: hreadx实时嵌入式操作系统源代码,ARM移植. threadx是一个很好的多任务实时嵌入式操作系统-ThreadX Library for ARM RISC microprocessor. ThreadX is a high performance RTOS that is wildly used in industrail world-wide.-hreadx real-time embedded operating system source code, ARM transplantation. threadx a good multi-tasking real-time embedded operating system-ThreadX Library for ARM RISC microprocessor. ThreadX is a high performance RTOS that is wildly used in. industrail world-wide.
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Size: 2704384 |
Author: Lee |
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Description: Linux/PA-RISC Project Floating-point emulation code
-Linux/PA-RISC Project Floating-point emulation code
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Size: 4096 |
Author: vaocongzang |
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Description: TIFF Library RISC OS specific Routines Source Code for Linux.
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Size: 3072 |
Author: ganfieki |
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Description: 精简指令集CPU，可完成移位，跳转等简单功能，适用于FPGA学习，本代码使用verilog编写。-RISC CPU, to be completed by the shift, jumps and other simple functions for FPGA learning to write the code using verilog.
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Size: 1884160 |
Author: 晓东 |
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Description: The Texas Instruments CC430 family of ultralow-power microcontroller system-on-chip (SoC) with integrated RF
transceiver cores consists of several devices featuring different sets of peripherals targeted for a wide range of
applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life
in portable measurement applications. The device features the powerful MSP430 16-bit RISC CPU, 16-bit
registers, and constant generators that contribute to maximum code efficiency.
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Size: 1563648 |
Author: dmimed |
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Description: DLX指令集RISC CPU verilog源码，使用哈佛结构可实现十多种指令-DLX instruction set RISC CPU verilog source code, using the Harvard architecture can achieve more than ten kinds of instruction
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Size: 3072 |
Author: 石建刚 |
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Description: Risc 64 - Bit Verilog Code
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Size: 1024 |
Author: thannasantosh |
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Description: 我是2014级复旦的研究生。这是一个8位的CPU设计VHDL实现。本CPU基于RISC架构，实现了cpu的基本功能如：加减乘除运算，跳转等。此外，里面有一个17位的ROM区，是存储指令的。你可以写出一段17位的指令代码，并放入ROM区，该CPU即可自动运行出结果。压缩包里是源代码和我们当时的设计要求。本源代码的最后调试时在地址0 17是放入的斐波纳契数字(Fibonacci Numbers)指令。通过modelsim仿真即可看到结果。-I am a 2014 graduate of Fudan University. This is an 8-bit CPU design VHDL implementation. The CPU based on RISC architecture to achieve the basic functions, such as cpu: arithmetic operations, jumps and so on. In addition, there are a ROM area 17, is stored in the instruction. You can write some 17 of the instruction code, and placed in the ROM area, the CPU will automatically run the result. Compression bag is the source code and design requirements of our time. When the final commissioning source code is placed in the address 0 17 of Fibonacci numbers (Fibonacci Numbers) instruction. You can see the results of the simulation by modelsim.
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Size: 520192 |
Author: ljt |
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Description: High-performance, Low-power Atmel AVR 8-bit Microcontroller
Advanced RISC Architecture
̶ 131 Powerful Instructions – Most Single-clock Cycle Execution
̶ 32 x 8 General Purpose Working Registers
̶ Fully Static Operation
̶ Up to 16MIPS Throughput at 16MHz
̶ On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
̶ 16KBytes of In-System Self-programmable Flash program memory
̶ 512Bytes EEPROM
̶ 1KByte Internal SRAM
̶ Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
̶ Data retention: 20 years at 85°C/100 years at 25°C(1)
̶ Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
̶ Programming Lock for Software Security-High-performance, Low-power Atmel AVR 8-bit Microcontroller
Advanced RISC Architecture
̶ 131 Powerful Instructions – Most Single-clock Cycle Execution
̶ 32 x 8 General Purpose Working Registers
̶ Fully Static Operation
̶ Up to 16MIPS Throughput at 16MHz
̶ On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
̶ 16KBytes of In-System Self-programmable Flash program memory
̶ 512Bytes EEPROM
̶ 1KByte Internal SRAM
̶ Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
̶ Data retention: 20 years at 85°C/100 years at 25°C(1)
̶ Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
̶ Programming Lock for Software Security
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Size: 3896320 |
Author: ImranKhan |
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